Coherent Accelerators, FPGAs, and PLD Microconference Accepted into LPC 2016

It has been more than a decade since CPU core clock frequencies stopped doubling every 18 months, which has shifted the search for performance from the “hardware free lunch” to concurrency and, more recently, hardware accelerators. Beyond accelerating computational offload, field-programmable gate arrays (FPGAs) and programmable logic devices (PLDs) have long been used in the embedded space to provide ways to offload I/O or to implement timing-sensitive algorithms as close as possible to the pin.

Regardless of how they are used, however, there exists a common class of problems which accompany the use of FPGAs, accelerators, and PLDs on Linux. Perhaps most important are the probing, discovery, and enumeration of these devices, which can be a challenge given the wide variety of interconnects to which they may be attached.

The purpose of this microconference is to discuss these problems, and figure out what it would take to make these devices first-class citizens on Linux. We will be looking at important use cases, including the much-maligned network-offload case as well as the more general topic of workload acceleration.

For more details on coherent accelerators, FPGAs, and PLDs, please see this microconference’s wiki page.

We hope to see you there!

Post a Comment

Your email is never shared. Required fields are marked *

*
*